#include "lcd_init.h"
#include "stdio.h"

typedef void (*FunType)(void);

void wr_cmd_4spi_8bcs(uint8_t par)
{
    LCD_DCXLow();
    LCD_CSLow();

    LCD_SCLLow();
    if (par & 0x80)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x40)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x20)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x10)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x08)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x04)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x02)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x01)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_CSHigh();
    LCD_DCXHigh();
    HAL_Delay(5);
}
void wr_dat_4spi_8bcs(uint8_t par)
{
    LCD_DCXHigh();
    LCD_CSLow();

    LCD_SCLLow();
    if (par & 0x80)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x40)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x20)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x10)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x08)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x04)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x02)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_SCLLow();
    if (par & 0x01)
        LCD_SDAHigh();
    else
        LCD_SDALow();
    LCD_SCLHigh();

    LCD_CSHigh();
    LCD_DCXHigh();
    HAL_Delay(1);
}
void wr_cmd_parall1_8(uint16_t par)
{
    LCD_DCXLow();
    LCD_CSLow();
    LCD_WRLow();
    GPIOB->ODR = par;
    LCD_WRHigh();
}
void wr_dat_parall1_8(uint16_t par)
{
    LCD_DCXHigh();
    LCD_WRLow();
    GPIOB->ODR = par;
    LCD_WRHigh();
}
void wr_cmd_parall2_8(uint16_t par)
{
    LCD_DCXLow();
    LCD_CSLow();
    LCD_WRLow();
    GPIOB->ODR = par << 1;

    LCD_WRHigh();
}
void wr_dat_parall2_8(uint16_t par)
{
    LCD_DCXHigh();
    LCD_WRLow();
    GPIOB->ODR = par << 1;

    LCD_WRHigh();
}
void wr_cmd_parall1_16(uint16_t par)
{
    LCD_DCXLow();
    LCD_CSLow();
    LCD_WRLow();
    GPIOB->ODR = par;

    LCD_WRHigh();
}
void wr_dat_parall1_16(uint16_t par)
{
    LCD_DCXHigh();
    LCD_CSLow();
    LCD_WRLow();
    GPIOB->ODR = par;

    LCD_WRHigh();
}
void wr_displ_parall1_18(uint16_t color1, uint16_t color2)
{
    LCD_DCXHigh();
    LCD_WRLow();
    if (color1 & 0x02)
        HAL_GPIO_WritePin(DB17_GPIO_Port, DB17_Pin, GPIO_PIN_SET);
    else
        HAL_GPIO_WritePin(DB17_GPIO_Port, DB17_Pin, GPIO_PIN_RESET);
    if (color1 & 0x01)
        HAL_GPIO_WritePin(DB16_GPIO_Port, DB16_Pin, GPIO_PIN_SET);
    else
        HAL_GPIO_WritePin(DB16_GPIO_Port, DB16_Pin, GPIO_PIN_RESET);
    GPIOB->ODR = color2;
    LCD_WRHigh();
}

void HW_Reset(void)
{
    LCD_RSTHigh();
    HAL_Delay(120);
    LCD_RSTLow();
    HAL_Delay(120);
    LCD_RSTHigh();
    HAL_Delay(200);
}

void Delay(uint32_t ms)
{
    HAL_Delay(ms);
}

void NV3041_SPI_Write_cmd(uint16_t v)
{
    wr_cmd_parall1_8(v);
}

void NV3041_SPI_Write_data(uint16_t v)
{
    wr_dat_parall1_8(v);
}

void CTRL_IO(GPIO_TypeDef *port, uint16_t pin, uint16_t state)
{
    GPIO_InitTypeDef GPIO_InitStruct = {0};

    GPIO_InitStruct.Pin = pin;
    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
    HAL_GPIO_Init(port, &GPIO_InitStruct);

    // LCD_RSTHigh();
    HAL_GPIO_WritePin(port, pin, state);
}

void initial(void)
{
    LCD_RDHigh();
    HW_Reset();
    NV3041_SPI_Write_cmd(0xff);
    NV3041_SPI_Write_data(0xa5);
    NV3041_SPI_Write_cmd(0xE7); // TE_output_en
    NV3041_SPI_Write_data(0x10);
    NV3041_SPI_Write_cmd(0x35);  // TE_ interface_en
    NV3041_SPI_Write_data(0x00); // 01
    NV3041_SPI_Write_cmd(0x36);
    NV3041_SPI_Write_data(0xc8); // c0
    NV3041_SPI_Write_cmd(0x3A);
    NV3041_SPI_Write_data(0x00); // 01---565/00---666
    NV3041_SPI_Write_cmd(0x40);
    NV3041_SPI_Write_data(0x01); // 01:IPS/00:TN
    NV3041_SPI_Write_cmd(0x41);
    NV3041_SPI_Write_data(0x23); // 01--8bit//03--16bit
    NV3041_SPI_Write_cmd(0x44);  // VBP
    NV3041_SPI_Write_data(0x15);
    NV3041_SPI_Write_cmd(0x45); // VFP
    NV3041_SPI_Write_data(0x15);
    NV3041_SPI_Write_cmd(0x7d); // vdds_trim[2:0]
    NV3041_SPI_Write_data(0x03);
    NV3041_SPI_Write_cmd(0xc1);  // avdd_clp_en avdd_clp[1:0] avcl_clp_en avcl_clp[1:0]
    NV3041_SPI_Write_data(0xbb); // 0xbb 88 a2
    NV3041_SPI_Write_cmd(0xc2);  // vgl_clp_en vgl_clp[2:0]
    NV3041_SPI_Write_data(0x05);
    NV3041_SPI_Write_cmd(0xc3); // vgl_clp_en vgl_clp[2:0]
    NV3041_SPI_Write_data(0x10);
    NV3041_SPI_Write_cmd(0xc6); // avdd_ratio_sel avcl_ratio_sel vgh_ratio_sel[1:0] vgl_ratio_sel[1:0]
    NV3041_SPI_Write_data(0x3e);
    NV3041_SPI_Write_cmd(0xc7); // mv_clk_sel[1:0] avdd_clk_sel[1:0] avcl_clk_sel[1:0]
    NV3041_SPI_Write_data(0x25);
    NV3041_SPI_Write_cmd(0xc8); // VGL_CLK_sel
    NV3041_SPI_Write_data(0x21);
    NV3041_SPI_Write_cmd(0x7a);  // user_vgsp
    NV3041_SPI_Write_data(0x51); // 58
    NV3041_SPI_Write_cmd(0x6f);  // user_gvdd
    NV3041_SPI_Write_data(0x49); // 4F
    NV3041_SPI_Write_cmd(0x78);  // user_gvcl
    NV3041_SPI_Write_data(0x57); // 70
    NV3041_SPI_Write_cmd(0xc9);
    NV3041_SPI_Write_data(0x00);
    NV3041_SPI_Write_cmd(0x67);
    NV3041_SPI_Write_data(0x11);
    // gate_ed
    NV3041_SPI_Write_cmd(0x51); // gate_st_o[7:0]
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0x52);  // gate_ed_o[7:0]
    NV3041_SPI_Write_data(0x7D); // 7A
    NV3041_SPI_Write_cmd(0x53);  // gate_st_e[7:0]
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0x54);  // gate_ed_e[7:0]
    NV3041_SPI_Write_data(0x7D); // 7A
    // sorce
    NV3041_SPI_Write_cmd(0x46); // fsm_hbp_o[5:0]
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0x47); // fsm_hfp_o[5:0]
    NV3041_SPI_Write_data(0x2a);
    NV3041_SPI_Write_cmd(0x48); // fsm_hbp_e[5:0]
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0x49); // fsm_hfp_e[5:0]
    NV3041_SPI_Write_data(0x1a);
    NV3041_SPI_Write_cmd(0x44); // VBP
    NV3041_SPI_Write_data(0x15);
    NV3041_SPI_Write_cmd(0x45); // VFP
    NV3041_SPI_Write_data(0x15);
    NV3041_SPI_Write_cmd(0x73);
    NV3041_SPI_Write_data(0x08);
    NV3041_SPI_Write_cmd(0x74);
    NV3041_SPI_Write_data(0x10); // 0A
    /// test mode
    // NV3041_SPI_Write_cmd(0xf8);
    // NV3041_SPI_Write_data(0x16);
    // NV3041_SPI_Write_cmd(0xf9);
    // NV3041_SPI_Write_data(0x20);
    NV3041_SPI_Write_cmd(0x56); // src_ld_wd[1:0] src_ld_st[5:0]
    NV3041_SPI_Write_data(0x43);
    NV3041_SPI_Write_cmd(0x57); // pn_cs_en src_cs_st[5:0]
    NV3041_SPI_Write_data(0x42);
    NV3041_SPI_Write_cmd(0x58); // src_cs_p_wd[6:0]
    NV3041_SPI_Write_data(0x3c);
    NV3041_SPI_Write_cmd(0x59); // src_cs_n_wd[6:0]
    NV3041_SPI_Write_data(0x64);
    NV3041_SPI_Write_cmd(0x5a); // src_pchg_st_o[6:0]
    NV3041_SPI_Write_data(0x41);
    NV3041_SPI_Write_cmd(0x5b); // src_pchg_wd_o[6:0]
    NV3041_SPI_Write_data(0x3C);
    NV3041_SPI_Write_cmd(0x5c); // src_pchg_st_e[6:0]
    NV3041_SPI_Write_data(0x02);
    NV3041_SPI_Write_cmd(0x5d); // src_pchg_wd_e[6:0]
    NV3041_SPI_Write_data(0x3c);
    NV3041_SPI_Write_cmd(0x5e); // src_pol_sw[7:0]
    NV3041_SPI_Write_data(0x1f);
    NV3041_SPI_Write_cmd(0x60); // src_op_st_o[7:0]
    NV3041_SPI_Write_data(0x80);

    NV3041_SPI_Write_cmd(0x61); // src_op_st_e[7:0]
    NV3041_SPI_Write_data(0x3f);
    NV3041_SPI_Write_cmd(0x62); // src_op_ed_o[9:8] src_op_ed_e[9:8]
    NV3041_SPI_Write_data(0x21);
    NV3041_SPI_Write_cmd(0x63); // src_op_ed_o[7:0]
    NV3041_SPI_Write_data(0x07);
    NV3041_SPI_Write_cmd(0x64); // src_op_ed_e[7:0]
    NV3041_SPI_Write_data(0xe0);
    NV3041_SPI_Write_cmd(0x65); // chopper
    NV3041_SPI_Write_data(0x02);
    NV3041_SPI_Write_cmd(0xca); // avdd_mux_st_o[7:0]
    NV3041_SPI_Write_data(0x20);
    NV3041_SPI_Write_cmd(0xcb); // avdd_mux_ed_o[7:0]
    NV3041_SPI_Write_data(0x52);
    NV3041_SPI_Write_cmd(0xcc); // avdd_mux_st_e[7:0]
    NV3041_SPI_Write_data(0x10);
    NV3041_SPI_Write_cmd(0xcD); // avdd_mux_ed_e[7:0]
    NV3041_SPI_Write_data(0x42);
    NV3041_SPI_Write_cmd(0xD0); // avcl_mux_st_o[7:0]
    NV3041_SPI_Write_data(0x20);
    NV3041_SPI_Write_cmd(0xD1); // avcl_mux_ed_o[7:0]
    NV3041_SPI_Write_data(0x52);
    NV3041_SPI_Write_cmd(0xD2); // avcl_mux_st_e[7:0]
    NV3041_SPI_Write_data(0x10);
    NV3041_SPI_Write_cmd(0xD3); // avcl_mux_ed_e[7:0]
    NV3041_SPI_Write_data(0x42);
    NV3041_SPI_Write_cmd(0xD4); // vgh_mux_st[7:0]
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0xD5); // vgh_mux_ed[7:0]
    NV3041_SPI_Write_data(0x32);
    // gammma boe4.3
    NV3041_SPI_Write_cmd(0x80); // gam_vrp0
    NV3041_SPI_Write_data(0x00);
    NV3041_SPI_Write_cmd(0xA0); // gam_VRN0
    NV3041_SPI_Write_data(0x00);
    NV3041_SPI_Write_cmd(0x81);  // gam_vrp1
    NV3041_SPI_Write_data(0x06); // 07
    NV3041_SPI_Write_cmd(0xA1);  // gam_VRN1
    NV3041_SPI_Write_data(0x08); // 06
    NV3041_SPI_Write_cmd(0x82);  // gam_vrp2
    NV3041_SPI_Write_data(0x03); // 02
    NV3041_SPI_Write_cmd(0xA2);  // gam_VRN2
    NV3041_SPI_Write_data(0x03); // 01
    NV3041_SPI_Write_cmd(0x86);  // gam_prp0
    NV3041_SPI_Write_data(0x14); // 11
    NV3041_SPI_Write_cmd(0xA6);  // gam_PRN0
    NV3041_SPI_Write_data(0x14); // 10
    NV3041_SPI_Write_cmd(0x87);  // gam_prp1
    NV3041_SPI_Write_data(0x2C); // 27
    NV3041_SPI_Write_cmd(0xA7);  // gam_PRN1
    NV3041_SPI_Write_data(0x26); // 27
    NV3041_SPI_Write_cmd(0x83);  // gam_vrp3
    NV3041_SPI_Write_data(0x37);
    NV3041_SPI_Write_cmd(0xA3); // gam_VRN3
    NV3041_SPI_Write_data(0x37);
    NV3041_SPI_Write_cmd(0x84); // gam_vrp4
    NV3041_SPI_Write_data(0x35);
    NV3041_SPI_Write_cmd(0xA4); // gam_VRN4
    NV3041_SPI_Write_data(0x35);
    NV3041_SPI_Write_cmd(0x85); // gam_vrp5
    NV3041_SPI_Write_data(0x3f);
    NV3041_SPI_Write_cmd(0xA5); // gam_VRN5
    NV3041_SPI_Write_data(0x3f);
    NV3041_SPI_Write_cmd(0x88);  // gam_pkp0
    NV3041_SPI_Write_data(0x0A); // 0b
    NV3041_SPI_Write_cmd(0xA8);  // gam_PKN0
    NV3041_SPI_Write_data(0x0A); // 0b
    NV3041_SPI_Write_cmd(0x89);  // gam_pkp1
    NV3041_SPI_Write_data(0x13); // 14
    NV3041_SPI_Write_cmd(0xA9);  // gam_PKN1
    NV3041_SPI_Write_data(0x12); // 13
    NV3041_SPI_Write_cmd(0x8a);  // gam_pkp2
    NV3041_SPI_Write_data(0x18); // 1a
    NV3041_SPI_Write_cmd(0xAa);  // gam_PKN2
    NV3041_SPI_Write_data(0x19); // 1a
    NV3041_SPI_Write_cmd(0x8b);  // gam_PKP3
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0xAb); // gam_PKN3
    NV3041_SPI_Write_data(0x0a);
    NV3041_SPI_Write_cmd(0x8c);  // gam_PKP4
    NV3041_SPI_Write_data(0x17); // 14
    NV3041_SPI_Write_cmd(0xAc);  // gam_PKN4
    NV3041_SPI_Write_data(0x0B); // 08
    NV3041_SPI_Write_cmd(0x8d);  // gam_PKP5
    NV3041_SPI_Write_data(0x1A); // 17
    NV3041_SPI_Write_cmd(0xAd);  // gam_PKN5
    NV3041_SPI_Write_data(0x09); // 07
    NV3041_SPI_Write_cmd(0x8e);  // gam_PKP6
    NV3041_SPI_Write_data(0x1A); // 16 //16
    NV3041_SPI_Write_cmd(0xAe);  // gam_PKN6
    NV3041_SPI_Write_data(0x08); // 06 //13
    NV3041_SPI_Write_cmd(0x8f);  // gam_PKP7
    NV3041_SPI_Write_data(0x1F); // 1B
    NV3041_SPI_Write_cmd(0xAf);  // gam_PKN7
    NV3041_SPI_Write_data(0x00); // 07
    NV3041_SPI_Write_cmd(0x90);  // gam_PKP8
    NV3041_SPI_Write_data(0x08); // 04
    NV3041_SPI_Write_cmd(0xB0);  // gam_PKN8
    NV3041_SPI_Write_data(0x00); // 04
    NV3041_SPI_Write_cmd(0x91);  // gam_PKP9
    NV3041_SPI_Write_data(0x10); // 0A
    NV3041_SPI_Write_cmd(0xB1);  // gam_PKN9
    NV3041_SPI_Write_data(0x06); // 0A
    NV3041_SPI_Write_cmd(0x92);  // gam_PKP10
    NV3041_SPI_Write_data(0x19); // 16
    NV3041_SPI_Write_cmd(0xB2);  // gam_PKN10
    NV3041_SPI_Write_data(0x15); // 15
    NV3041_SPI_Write_cmd(0xff);
    NV3041_SPI_Write_data(0x00);
    NV3041_SPI_Write_cmd(0x11);
    HAL_Delay(120);
    NV3041_SPI_Write_cmd(0x29);
    HAL_Delay(20);
}
// void Filllcd_Area(uint16_t _usX, uint16_t _usY, uint16_t _usWidth , uint16_t _usHeight, uint16_t color)
void Filllcd_Area(uint16_t color)
{
    uint32_t x = 0;
    uint32_t y = 0;
    /*//显示区域限制
    wr_cmd_4spi_8bcs(GC9A01_CMD_CASETF);
    wr_dat_4spi_8bcs(_usX >> 8);
    wr_dat_4spi_8bcs(_usX );
    wr_dat_4spi_8bcs( (_usX + _usWidth - 1) >> 8);
    wr_dat_4spi_8bcs( (_usX + _usWidth - 1) );

    wr_cmd_4spi_8bcs(GC9A01_CMD_RASETF );
    wr_dat_4spi_8bcs(_usY >> 8);
    wr_dat_4spi_8bcs(_usY );
    wr_dat_4spi_8bcs( (_usY + _usHeight - 1) >> 8 );
    wr_dat_4spi_8bcs( (_usY + _usHeight - 1) );
    //准备接收数据*/
    /*wr_cmd_4spi_8bcs(0x2c);

    //uint8_t colorred = color >> 16;
    uint8_t color1 = (color & 0xff00) >> 8;
    uint8_t color2 = (color & 0xff);
    //uint8_t color1,color2;
    for( y=0; y < LCD_Height; y++ )
        {for( x=0; x < LCD_Width; x++ )
        {
            wr_dat_4spi_8bcs( 0xf8);
            wr_dat_4spi_8bcs( 0x00 );
        }
    }*/
    /*wr_c2c();

    for( y=0; y < LCD_Height ; y++ )
        {for( x=0; x < LCD_Width; x++ )
        {
            wr_num(0xf8);
            wr_num(0x00);
        }
    }*/
    wr_cmd_parall1_8(0X2C);

    for (y = 0; y < LCD_Height; y++)
    {
        for (x = 0; x < LCD_Width; x++)
        {
            wr_displ_parall1_18(0x0003, 0xF000);
            // wr_displ_parall2_18_H(0x0003);
            // wr_displ_parall2_18_L(0xF000);
        }
    }
}